Conventionally, a computer system includes a computer and a power supply apparatus which supplies power to the computer. The power supply apparatus includes a plurality of power supply units connected to one another in parallel. A voltage output from each of the power supply units is referred to respectively as a “unit output voltage”, and a voltage output from the power supply apparatus is referred to as a “power supply apparatus output voltage”. As a method for detecting a failure power supply unit in the system, a method for issuing an instruction for raising a unit output voltage of an arbitrary one of the power supply units connected to one another in parallel, individually, and detecting a power supply apparatus output voltage so as to determine a failure of the power supply unit has been known. This method makes use of a characteristic in which the power supply apparatus output voltage is substantially the same as the highest unit output voltage among unit output voltages output from the plurality of power supply units connected to one another in parallel. For example, when an instruction for raising a unit output voltage is supplied to a normal power supply unit among the power supply units, individually, the power supply apparatus output voltage rises. On the other hand, when an instruction for raising a voltage is supplied to a failure power supply unit among the power supply units, rise of the power supply apparatus output voltage is negligible. This characteristic will be explained with reference to FIG. 10.
FIG. 10 is a diagram illustrating voltages of a normal power supply unit and a failure power supply unit relative to an instruction for raising a voltage. In FIG. 10, a V axis corresponds to a voltage axis and at axis corresponds to a time axis. In the following description, a power supply unit in which a unit output voltage thereof is lowered due to a failure is referred to as a “failure power supply unit”. In FIG. 10, reference numerals 901 and 902 denote a power supply apparatus output voltage and a unit output voltage of a failure power supply unit, respectively. When an instruction for raising a voltage is supplied to one of normal power supply units except for the failure power supply unit at a time point 903, the power supply apparatus output voltage 901 rises. Thereafter, when the instruction for raising a voltage is cancelled at a time point 904, the power supply apparatus output voltage 901 returns. Similarly, when an instruction for raising a voltage is supplied to the failure power supply unit at a time point 905, the unit output voltage 902 rises. Thereafter, when the instruction for raising a voltage is cancelled at a time point 906, the unit output voltage 902 returns. When the instruction for raising a voltage is supplied, the unit output voltage of the failure power supply unit does not rise to the same level as that of a unit power voltage of the normal power supply unit. The unit output voltage of the failure power supply unit remains lower than the unit output voltages of the other normal power supply units. Therefore, the power supply apparatus output voltage 901 does not rise at the time point 905. Accordingly, by supplying the instruction for raising a voltage to each of the power supply units connected to one another in parallel and monitoring the power supply apparatus output voltage, a power supply unit corresponding to a power supply apparatus output voltage which barely rises can be determined as a failure power supply unit. That is, according to this determination method, a failure power supply unit is determined in accordance with a power supply apparatus output voltage output in response to an instruction for raising a voltage supplied to a power supply unit.
A technique that issues an instruction for raising a unit output voltage to a plurality of power supply units and detecting a failure power supply unit.    [Patent Document 1] Japanese Laid-open Patent Publication No. 57-009224    [Patent Document 2] Japanese Laid-open Patent Publication No. 60-102818